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New Features
- Support for DDR4 RAM (and associated hardware), including retrieval and reporting of DDR4-specific SPD details. This includes DDR4 RAM that support Intel XMP 2.0 DDR4 RAM timings.
- New RAM benchmarking feature allowing results to be graphed and saved to disk. Previous results can be graphed on the same chart for comparison.
- New "Hammer Test" for detecting disturbance errors caused by charge leakage when repeatedly accessing addresses in the same memory bank but different rows in a short period of time.
- Language support for French/German/Japanese/Chinese. All text are displayed in the selected language, including generated reports.
Fixes/Enhancements
- Added Haswell-E (DDR4) ECC support
- Added Xeon E5 v3 ECC support
- Added Ivy Bridge (non-Xeon) ECC support
- Added AMD Steppe Eagle ECC support
- Added Intel Atom E3800 SoC ECC support
- Fixed ECC detection for Ivy Bridge-EX/Haswell-EX chipsets that have a 2nd memory controller
- Fixed Intel5400 ECC registers not being reset after starting test
- Fixed ECC errors immediately being reported after starting test (Ivy Bridge-E)
- Added support for ECC injection for Intel Xeon E3 v3 (untested)
- Fixed handling of Intel ICH SMBUS built-in hardware semaphore to prevent SMBus device contention
- Fixed possible crash when DDR3 module type value in the RAM SPD info is invalid
- Fixed DDR4 SPD clock speed rounding errors in the RAM SPD info
- Fixed DDR3 SPD Register manufacturer/type in the RAM SPD info not appearing correctly
- CPU speed measurement is now more robust by taking multiple samples
- Fixed Intel turbo clock speed calculation
- Fixed detection of Intel turbo support for Xeon chipsets
- Increased maximum # of supported CPUs to 72
- Increased maximum # of supported RAM modules to 64
- Increased the number of supported memory controllers to 8
- New config file parameter 'ECCINJECT' for specifying whether to enable/disable ECC injection
- New config file parameter 'MEMCACHE' for specifying whether to enable/disable memory caching
- New config file parameter 'PASS1FULL' for specifying whether the first pass should run the full iteration or reduced iteration
- New config file parameter 'ADDR2CHBITS' to specify the address bits to XOR to determine the memory channel
- New config file parameter 'LANG' for specifying language to use on startup
- Console resolution is now forced to 80 x 25
- Graphics resolution is now set to a minimum of 1024 x 768
- Updated ImageUSB to v1.1.1015 which includes an option to zero the USB drive
- Running memory tests in parallel mode is now more robust for UEFI BIOS that exhibit inconsistent multiprocessor behaviour
- Fixed detection of the number of enabled processors for UEFI BIOS that exhibit inconsistent multiprocessor behaviour
- Fixed test status screen not being displayed correctly for consoles with small/large screen widths
- In the RAM SPD menu screen, PGUP/PGDN can be used to navigate between pages of RAM modules
- For specific cases where files under EFI\BOOT cannot be accessed (eg. grub2), log/report files shall be written to the root directory
- During MemTest86 boot-up, the system memory map is now written to log file
- Various optimizations of the size of the MemTest86 binary
- Forced a memory address limit of 32-bits when running under 32-bit UEFI
- Memory ranges to be tested are now allocated at the beginning of each test (due to the possibility that the memory map changes in the middle of testing)
- Reduced the number of log messages written when waiting for other processors to finish when running in parallel mode
- When allocating memory for Bit Fade Test, leave 1MB of free memory available (to prevent firmware drivers from running out of memory)
- Fixed potential crash or other unexpected behaviour due to memory issues with random functions
- Reports are now saved using UTF16 encoding to support Unicode characters
- Changed memory allocation behaviour by only pre-allocating memory segments >= 16MB to prevent memory
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