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Fixes/Enhancements
- Fixed certain parameters not being written when saving config file
- Prompt the user to confirm before overwriting config file
- Added support for ECC detection, memory timings and module decoding on Intel Bartlett Lake chipsets
- Added detection of whether ECC injection is disabled and locked by BIOS
- Fixed ECC false positives reported on Intel Alder Lake chipsets
- Fixed corrected errors reported as uncorrected on Intel Alder Lake chipsets
- Fixed ECC detection on multi-socket Skylake-SP chipsets due to variability of PCI bus numbers
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Fixed incorrect memory speeds reported due to incorrect detection of gear mode for the following chipsets:
- Intel Rocket Lake
- Intel Ice Lake
- Intel Tiger Lake
- Intel Alder Lake
- Intel Raptor Lake
- Intel Meteor Lake
- Intel Arrow Lake
- Memory timings are now reported based on tCK instead of WCK for LPDDR5 modules
- Fixed issue on program exit due as a side effect of polling memory timings on Zen 5 chipsets
- Fixed halt when accessing non-existing MCA registers on Zen 5 chipsets
- Improved robustness when detecting validity of DIMM temperature data obtained from CLTT
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